Work submissions to high performance I/O devices or accelerators can be scaled by a common command interface, also known as a Shared Work Queue (SWQ), in the device, which could be addressed by any number of ring-3 or ring-0 software clients through a set of new CPU instructions.
These new instructions, called ENQCMD & ENQCMDS, addresses the SWQ using a MMIO address, which in turn produces an atomic non-posted write transaction towards the device. This transaction carries with it a descriptor and associated information about the work that the client is attempting to submit to the device. When this transaction arrives at the SWQ, the device then makes a decision on whether it can successfully enqueue the work or not depending on a number of device/client/SWQ specific conditions. The binary result of this decision, success or retry, is then communicated back to the CPU and finally, to the issuing instruction in the form of an architecturally visible flag. This architecture allows an infinite number of clients to submit work to a finite SWQ, allowing for scalability in sharing of I/O device/accelerator across VMs & containers.